muhammadaldacher/Layout-Design-of-an-8x8-SRAM-array

The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout design is done using Cadence Virtuoso’s ADE, & the Static Noise Margin is obtained through Matlab scripts.

语言：MATLAB · GitHub 星标：102 · Fork：16

话题：cadence-virtuoso · cmos · layout · matlab · memory · sram

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