microdynamics-cpu/tree-core-cpu

A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain (chisel, mill, verilator, NEMU, AM and difftest framework, etc) to design and verify.

语言：Scala · GitHub 星标：47 · Fork：3

话题：chisel · cpu · processor · riscv · rt-thread · rtl · scala · softcore

在 GitHub 上查看原仓库