FPGAeduDesign/development_boards

HDL-based example projects (VHDL/Verilog) for testing and experimenting with the peripherals of FPGAeduDesign development boards: Explorer Lite-1k, Neo-5k, and Edge-9k.

语言：F# · GitHub 星标：3 · Fork：1

在 GitHub 上查看原仓库